Effect of signal transition variation on bit synchronizer performance

The effect of the signal transition variation, due to the signal transition density, data asymmetry, and sinusoidal modulation, on the performance of the data transition tracking loop (DTTL) symbol synchronizer is addressed. These factors will affect the DTTL performance, such as the clock jitter and the cycle slippage rate, and unnecessary system loss may result if the system parameters are not well selected. Given the background of C. S. Tsang and W. C. Lindsey (1986), this result can serve as an engineering design guideline for the DTTL in the context of the signal transition variation.<
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