Compiling multi-dimensional data streams into distributed DSP ASIC memory

The authors demonstrate that, next to allocation and scheduling of data path operations, efficient storage schemes and memory access are crucial in DSP (digital signal processor) ASIC (application-specific integrated circuit) design. For complex, medium throughput DSP applications, the authors have identified a strategy and important optimization tasks for compiling multidimensional data structures into distributed dual-port register files and single-port SRAM (static random-access memories). These techniques have been implemented in the Cathedral-II silicon compiler. The applicability of the proposed strategy has been demonstrated during the design of an 800 bit/s vocoder. Window computation reduced 23833 entries of 56 arrays to 932 locations.<
>