KISS-16V1: a 16 bit signal processor

The authors describe the architecture and design of the 1 6-b low-power CMOS fixed-point signal processor KISS-16V1. The 16-b data and instructions are processed in one 50-ns cycle. The KISS-16V1 is a digital-signal processor (DSP) with a multibus Harvard architecture. Its new architectural features and its sophisticated instruction set are optimized for digital telecommunications, especially for GSM. A power-down mode together with the capability of memory and multiplier standby operation make this DSP well suited for hand-held devices. A design strategy based on the extensive use of cell compilers and synthesis tools reduces the design period of further DSP derivations to a minimum. This flexible concept allows adaptation of the device for enhanced requirements of GSM as well as for other signal processing applications. This DSP is a significant step toward an all-digital-on-one-chip solution for the GSM full-rate channel.<
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