Lithographic manufacturing techniques for wafer scale integration

A methodology utilizing a mix-and-match approach of optical 1*lithography and e-beam lithography currently used at TRW for WSI (wafer scale integration) technologies is discussed. Field stitching techniques, design considerations, and macrocell grouping techniques which enhance field stitching capability and impact design rules are described for this mix and match e-beam and 1*optical stepper lithography process. A comparative cost analysis of WSI tooling costs, WSI wafer throughput, and WSI tooling requirements is presented to illustrate the tradeoffs among the various lithography systems. The proposed lithography process has been experimentally verified using test chip field stitching structures.<
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