Small-World Power-Law Interconnects for Nanoscale Computing Architectures

Interconnects on today’s chips have become more important than transistors and this trend is predicted to continue with ongoing miniaturization and forthcoming beyond-silicon technologies. Current ad hoc interconnect technology is not suitable for multi-billion-transistor chip integration and we argue that radically new approaches potentially offer better performance for a lower price. The goal of this paper is to explore certain design and performance tradeoffs of both regular and irregular interconnect fabrics for self-assembled nanoscale electronics in a realistic framework. We show that fabrics with small-world-like properties have major advantages in terms of performance and robustness over purely regular fabrics. Our findings support the unconventional approach of self-assembling nanoscale electronics in a mostly random manner, which is believed to be more fabrication friendly and thus cheaper to realize.