Integration of Selective SiGe Epitaxy for Source/Drain Application in MOSFETs

In this paper the selective epitaxy of B- and P-doped SiGe layers on either HCl-etched or un-processed Si surfaces for S/D application in CMOS structures have been investigated. The study has focused on how to obtain high quality layers and tackle subjects e.g. dopant incorporation and defect generation in these layers