A Comparative Study of NBTI and PBTI (Charge Trapping) in SiO2/HfO2 Stacks with FUSI, TiN, Re Gates

Threshold voltage (V
_t
) of a field effect transistor (FET) is observed to shift with stressing time and this stress induced V
_t
shift is an important transistor reliability issue. V
_t
shifts that occur under negative gate bias is referred as NBTI and those that occur under positive bias is referred as PBTI or charge trapping. In this paper, we present a comparative study of NBTI and PBTI for a variety of FETs with different dielectric stacks and gate materials. The study has two parts. In part I, NBTI and PBTI measurements are performed for FUSI NiSi gated FETs with SiO
₂
SiO
₂
/HfO
₂
and SiO
₂
/HfSiO as gate dielectric stacks and the results are compared with those for conventional SiON/poly-Si FETs. The main results are: (i) NBTI for SiO
₂
/NiSi and SiO
₂
/HfO
₂
/NiSi are same as those conventional SiON/poly-Si FETs; (ii) PBTI significantly increases as the Hf content in the high K layer is increased; and (iii) PBTI is a greater reliability issue than NBTI for HfO
₂
/NiSi FETs. In part II of the study, NBTI and PBTI measurements are performed for SiO2/HfO2 devices with TiN and Re as gates and the results are compared with those for NiSi gated FETs. The main results are: (i) NBTI for SiO
₂
/HfO
₂
/TiN and SiO
₂
/HfO
₂
/Re pFETs are similar with those observed for NiSi gated pFETs; and (ii) PBTI in TiN and Re gated HfO
₂
devices is much smaller than those observed for SiO
₂
/HfO
₂
/NiSi. In summary for SiO
₂
/HfO
₂
stacks, NBTI is observed to be independent of gate material whereas PBTI is significantly worse for FUSI gated devices. Consequently, HfO
₂
FETs with TiN and Re gates exhibit over all superior transistor reliability characteristics in comparison to HfO
₂
/FUSI FETs