State Assignments for Asynchronous Sequential Machines

In this paper, a heuristic state assignment algorithm for asynchronous sequential machines is presented. Machines realized by this assignment scheme will result in circuits having a small amount of gate inputs and operating in single transition time. It is also shown that for a flow table having m
1
input columns, m input variables, and d stable states, the number of gate inputs required for a single transition time realization is bounded by d(m
1
+m+1).