A photonic crystal power/ground layer for eliminating simultaneously switching noise in high-speed circuit

A novel photonic crystal power/ground layer (PCPL) is proposed to efficiently suppress the power/ground bounce noise (P/GBN) or simultaneously switching noise (SSN) in high-speed digital circuits. The PCPL is designed by periodically embedding high dielectric-constant rods into the substrate between the power and ground planes with a small area filling ratio less than 10%. The PCPL can efficiently eliminate the SSN (over 60 dB) with broad stopband bandwidth (totally over 4 GHz) below the 10-GHz range, and in the time domain, the P/GBN can be significantly reduced over 90%. The PCPL not only performs good power integrity, but also keeps good signal quality with significant improvement on eye patterns for high-speed signals with via transitions. In addition, the proposed designs perform low radiation (or electromagnetic interference) caused by the SSN within the stopbands. These extinctive behaviors both in signal integrity and electromagnetic compatibility are demonstrated numerically and experimentally. Good agreements are seen. The bandgap maps to help design the PCPL structure are also demonstrated based on the two-dimensional finite-difference time-domain method.