Technology validation: NMP ST8 Dependable Multiprocessor Project

Current and future space-based processing applications are requiring, and will require, increasing amounts of onboard processing capability. One way to achieve a high level of processing capability is through the use of COTS (commercial-off-the-shelf) high-performance processors. While state-of-the-art COTS processors are exhibiting adequate total integrated dose (TID) performance to meet the requirements of the natural space radiation environment, single event upsets (SEUs) caused by galactic cosmic rays and solar protons remain a problem. Traditional approaches to mitigate the SEU problem involve fixed redundancy schemes such as self checking pairs (SCP) or triple modular redundancy (TMR). While effective in mitigating the effects of SEUs, use of these techniques comes at a high price, 100% overhead for SCP, and 200% overhead for TMR, particularly when such a level of protection is not needed. In such cases, it would be beneficial to be able to convert that overhead into useful mission processing capability or power reduction. The idea behind Dependable Multiprocessor is to sense the environment and configure the processing system appropriately to maximize the computational performance density, i.e., the computational performance to power ratio, available to the mission. The goal of the Dependable Multiprocessor Project is to provide spacecraft/payload processing capability 10times - 100times what is available today, enabling heretofore unrealizable levels of science and autonomy. To date, Dependable Multiprocessor (DM) technology has been developed as part of NASA's New Millennium Program (NMP) ST8 (Space Technology 8) project. The objective of this NMP ST8 effort is to combine high-performance, fault tolerant, COTS-based cluster processing and fault tolerant middleware in an architecture and software framework capable of supporting a wide variety of mission applications. Dependable Multiprocessor development is continuing as one of the four selected ST8 flight experiments. The focus of the current phase of the Dependable Multiprocessor project is two-fold: 1) to meet the TRL5 Technology Maturity Assessment technology validation requirements and 2) to complete the plans for the TRL7 flight experiment and demonstration. This paper describes the validation experiments, demonstrations, and performance achieved to date, and the plans for Dependable Multiprocessor flight validation