Designing for 1/sup st/ and 2/sup nd/ level reliability of micro-electronic packages using combined experimental - numerical techniques

This paper presents our effort to predict IC, packaging, and board level reliability problems. Micro-electronic based reliability problems are driven by the mismatch between the different material properties, such as thermal expansion, hygro-swelling, and/or the degradation of interfacial strength. In the past, such reliability problems were treated separately, but recent development have made clear that total product reliability concerns the interaction of IC, package, and PCB. This paper presents parts of our strategy to assess this integrated reliability by combining experimental and numerical techniques