A tool towards integration of IC process, device, and circuit simulation

An interactive tool suitable for accurate characterization of arbitrary submicron devices is presented. The tool uses a transparent link with device simulation to obtain more accuracy than is possible with analytic models. While the tool can be used to generate typical device characteristics (I-V curves and delay analysis) useful for sensitivity analysis and analytic model development, a greater benefit of the tool is its ability to analyze parasitic devices that may lead to reliability problems. These parasitic devices are extremely difficult to characterize and tend to be overlooked. The tool is used to investigate the influence of these parasitics by analyzing the effect of layout on the latchup characteristics of a standard cell.<
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