A power efficient channel coder/decoder chip for GSM terminals

A compact power and computing delay efficient channel codec chip for the pan-European digital cellular radio (Group Special Mobile, or GSM) system is presented. This key component for the hand-portable mobile station is realized through a dedicated architecture and application-tailored memories. Full scan design and self-test facilities result in time and coverage efficient testing. This chip was developed in 1.2- mu m CMOS technology. The power, size, and processing time compare favorably to those for any standard processor-based implementation.<
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