The Study of PMOS Vth Distribution Using Process and Device Simulations and C-V Measurements

Measurements of threshold voltage (V
_th
) of PMOS transistors with buried channel realized in 0.8mum CMOS technology give large spread of the threshold values. To understand the spread of V
_th
we use C-V measurements to obtain doping profile in channel region, and process and device simulations to simulate the experimental results. A good agreement between the experimental results and simulation shows that the spread of V
_th
originates from different doping profiles in channel region