Design and characterization of input and output (I/O) pads

The design of reliable input and output (I/O) pads require thorough understanding of process technology, especially for electrostatic discharge (ESD) and latch up protection. This paper describes the design methodology and characterization of I/O pads. This methodology includes SPICE simulation, layout drawing and silicon characterization. The I/O pads have been experimentally evaluated under test devices fabricated using MIMOS's 3.3V 0.35/spl mu/m CMOS process technology. The comparison between the measured performance and simulation is presented in this paper.