Microprocessor development using SFL for educational purposes

In many universities, undergraduate students who want to design microprocessors can use the currently available methods such as Verilog (Jackson and McGhee, 1993) or C language (Yim et al., 1997) to describe digital circuits and experiments. However, these methods are complex and difficult for learners to understand. Moreover, through our experience in educating the digital circuits design using VHDL, poor results were obtained and not suitable for learner's design. This paper aims to present a summary of the microprocessors development using SFL (structured functional description language), for undergraduate student projects. Undergraduate students in our laboratory have developed many microprocessors architectures using SFL including PDP-11 architecture, i8086 architecture, VAX-11/780 architecture and etc. They have spent approximately 1 year to develop each microprocessor, starting without knowledge of hardware description language. In summary, SFL helps the designers to describe a digital circuits and logic synthesis more easily and directly.