Design for ASIC reliability for low-temperature applications

A methodology for designing reliability into electronics for low-temperature applications has been developed. The proposed hot carrier aging lifetime projection model takes account of the evaluation of the hot carrier aging impact on the technology, analysis of circuit critical paths, transistor substrate current profile and temperature profile to determine the most applicable transistor size in order to meet reliability requirements. This methodology can be applied to other transistor-level failure and/or degradation mechanisms for applications with a varying temperature ranges.