A 12 bit analog to digital converter for VLSI applications in nuclear science

A high-density monolithic analog-to-digital converter (ADC) has been designed and tested. The ADC features small silicon area and low power consumption for use in multichannel circuits for massively parallel particle physics detectors. The chip contains a linear ramp, precision high-speed comparators, a pipelined counter, and double buffering storage latches fabricated in a 2- mu m, 2 polysilicon CMOS technology. The prototype integrated circuit successfully combined digital frequencies in excess of 70 MHz, with analog signals smaller than 1 mV. Test results showed 1/4096 root-mean-square errors at conversion rates above 30 kHz, with less than 4 mW per channel power dissipation.<
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