Development of a pipelined ADC chip for the gas electron multiplier readout

A 10-bit 10 Msps A/D converter chip with low power consumption is designed for gas electron multiplier (GEM) readout based on the n-well 0.35 /spl mu/m CMOS process. A pipelined ADC architecture consisting of an array of 1.5-bit unit ADCs is used. The opamp sharing between two stages is adopted in order to reduce the power consumption. The expected power consumption is about 12 mW. In this paper, the progress of the design development is reported.