Design and evaluation of a second generation multi-technology field programmable gate array

In order to extend the flexibility, rapid prototyping and reusability benefits associated with conventional FPGAs into the multi-technology domain, the novel idea of a multi-technology field programmable gate array (MT-FPGA) has been suggested. In this paper we propose an improved version of the MT-FPGA which considerably optimizes speed, area and power when compared to the previous design. This innovative design is also equipped with dedicated carry-chain logic modules in the multi-technology logic clusters to efficiently perform several arithmetic operations. The improved design of the programmable I/O module provides greater observability and controllability. Results comparing the speed, area and power dissipation metrics between the two generations of the MT-FPGAs are presented. These can be used for closely predicting the performance of any M by N array MT-FPGA.