Harmonic characterization of mismatches in deep sub-micron varactors for a digitally controlled RF oscillator

Precise modeling and understanding of all nonlinear characteristics in radio-frequency (RF) CMOS circuits is a pre-requisite to the successful integration of modern CMOS radios. This paper summarizes a harmonic characterization techniques used to estimate the mismatches in the minimal size inversion-type CMOS tuning varactors of a digitally controlled RF oscillator (DCO). The DCO is the centerpiece of the first ever all-digital phase locked loop (ADPLL) fabricated in 90 nm digital CMOS that meets the challenging GSM performance specifications. Full-scale VHDL simulations as well as lab measurements confirm that the tracking bank varactors have a better than 5% mismatch, thus contributing to the excellent modulation performance of the RF chip