Real-time FPGA-based architecture for bicubic interpolation: an application for digital image scaling

One of the most extended algorithms for image scaling is bicubic interpolation. In this paper, a hardware architecture for bicubic interpolation (HABI) is proposed. The HABI proposed is integrated by three main blocks: the first one generates the interpolation coefficients, which implements the bicubic function to be used in HABI; the second one performs the interpolation process and the third one is a control unit that synchronizes the processing and the pipeline stages. The architecture work with monochromatic images, but it can be extended for working with RGB color images. Our design description is coded in Handel-C language and implemented on a Xilinx Virtex II Pro FPGA. The proposed system runs 10 times faster than an Intel Pentium 4-based PC at 2.4 GHz. Comparison with other related works are provided