Constant Capacitance Deep-Level Transient Spectroscopy Study of Bulk Traps and Interface States in P Implanted Si MOS Capacitors

Constant capacitance deep-level transient spectroscopy (CC-DLTS) has been used to study bulk traps and interface states in Si metal-oxide semiconductor (MOS) capacitors with 50 nm thick thermally-grown oxides on an n-type substrate. Both as-grown and P-implanted samples were studied. The P implants were performed at 50 keV to a dose of 1 × 10
¹⁰
cm
^-2
. Thermal anneals in the temperature range 200-400°C were performed on implanted and as-grown samples to examine the dynamics of trap annealing