A review of time jitter and digital systems

Time jitter is an important parameter for determining the performance of digital systems. This paper reviews how time jitter impacts the performance of digital systems. For the purposes of later discussions, digital systems are broken down into three major categories: synchronous data transfer, asynchronous data transfer, and digital sampling systems. A statistical framework is first developed for treating time jitter. This framework explicitly deals with issues of bandwidth and noise processes with 1/f
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spectra. It is shown that various forms of the standard variance of time jitter are convergent in the presence of 1/f
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noise, if one explicitly considers the properties of the system phase response function for each of these categories. It is also shown that standard variances are preferred over 2nd difference variances in dealing with digital performance issues such as bit errors, because standard variances can be directly related to the total time error (jitter plus skew). Detailed discussions of how time jitter impacts the enumerated categories of digital systems are then presented. In synchronous data transfer systems, it is shown that time jitter causes hard bit errors, that only the white noise components of clock oscillator and gate noise make appreciable contributions to the time jitter, and that aliasing of this white noise is a major issue. In asynchronous systems, it is shown that time jitter can also cause soft errors or bit error rate degradation and that there is an additional time jitter term due to relative master clock-local clock oscillator jitter, whose value is determined by 1/f
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oscillator noise as well as the white noise. Finally, for digital sampling in analog-to-digital and digital-to-analog converters, it is shown that noise power or multiplicative decorrelation noise generated by sampling clock jitter is a major limitation on the bit resolution (effective number of bits) of these devices