On networking multithreaded processor design: hardware thread prioritization

Packet processing applications in networking equipment must fulfil very high throughput requirements. At the same time, packet processing differentiation by means of packet classification, such as voice vs. e-mail, or DiffServ, must be obeyed. An efficient way to fulfil both requirements is to use numerous hardware threads combined with thread prioritization. This paper proposes a new thread prioritization method for a hardware multithreaded processor. The originality of the method is identified in the derivation mechanism of the thread priorities, which is based on inputs from three distinct sources; namely, the threads themselves, a control unit such as an operating system, and external sources such as timers or synchronization coprocessors. These sources are explicitly selected to fulfil the requirements of their distinct nature, namely software, middleware and hardware. The proposed method achieves the desired thread differentiation without hindering performance or increasing costs, as demonstrated by initial experimental results