A RadHard-by-Design Clock Generator

Aeroflex Colorado Springs has designed and tested a RadHard-by-Design frequency and skew selectable clock generator integrated circuit (IC). The clock generator is implemented with a RadHard phase locked loop (PLL) and selectable skew control. The PLL is designed for low jitter performance in space applications. The RadHard clock generator achieves either 300 krad(Si) or greater than 1.0 Mrad(Si) total ionizing dose performance on a commercial 0.25mum shallow trench isolation CMOS line using RadHard-by-Design practices. Single event latchup (SEL), single event upset (SEU) and single event transient (SET), due to charged particle strikes, are mitigated by a combination of circuit and layout design techniques. The clock generator is SEL immune to > 109 MeV-cm
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