MOS gate current characteristics and their implications for lifetime area scaling

In this paper, the gate current in p-MOS and n-MOS devices in inversion and accumulation mode is studied. We find that in accumulation mode the current passing the oxide is not uniformly distributed over the oxide area, but much higher in the region near source and drain of the transistor. This spatially changing current density has important implications for the area scaling of the lifetime of the device. Our results for the time to breakdown show that standard (Poisson model) area scaling leads to an over-optimistic prediction for device lifetimes.