Three-dimensional 35 nF/mm/sup 2/ MIM capacitors integrated in BiCMOS technology

Decoupling applications require high capacitance values. To optimize the chip performances, it appears particularly interesting to integrate them directly in interconnect levels, especially in BiCMOS technology. In order to reach this goal and minimize the area occupied by such devices, three-dimensional MiM capacitors have been introduced with different dielectrics: Ta/sub 2/O/sub 5/ deposited by MOCVD and A1/sub 2/O/sub 3/ by ALD. Thus, high capacitance density of 35nF/mm/sup 2/ has been reached. Through comparison between planar and three dimensional (3D) MIM capacitor characterization, it has been demonstrated that 3D MIM capacitor, named high density trench capacitor (HiDTC), architecture is a very promising candidate to integrate such high capacitance values.