Novel single-poly EEPROM with damascene control-gate structure

A novel single-poly EEPROM using damascene control gate (CG) structure is presented in this letter. The CG is tungsten (W) line made by a damascene process, and intergate dielectric is Al/sub 2/O/sub 3/ grown by atomic layer deposition (ALD). The program and erase mechanism is the same as the one for traditional stacked-gate cell, which uses the channel hot electron injection for programming and Fowler-Nordheim tunneling for channel erasing. With the high dielectric constant (K) property of Al/sub 2/O/sub 3/, we can perform the program and erase function with a voltage less than 6.5 V, which can be handled by 3.3 V devices instead of traditional high voltage devices. In the process compatibility aspect, this new cell needs only two extra masking steps over the standard CMOS process, and the high-/spl kappa/ material is deposited in the back-end metallization steps without the contamination concerns on the front-end process. Therefore, this new technology is suitable for embedded application. In this letter, the good cell performance is demonstrated; such as, fast programming/erasing, good endurance and data retention.