Row-column decomposition based 2D transform optimization on subword parallel processors

This paper discusses the row-column decomposition based 2D block transform implementations, in which the matrix transpose plays a crucial role. A subword parallel VLIW processor architecture supporting simultaneous data processing and matrix transpose provides the required functionality for fast and flexible transform implementations. In addition, new instructions are proposed to further speed up the transforms in the H.264/AVC. With the proposed architectural optimizations, a speed-up by 2.7 is achieved for the 2D DCT/IDCT and a speed-up by over two for the transforms in the H.264/AVC, when compared to the sequential implementations.