General in-place scheduling for the Viterbi algorithm

It is shown how to find in-place schedules for all kinds of trellises, including periodic and aperiodic in-place schedules. It is also shown how to verify the existence of aperiodic and periodic in-place schedules. With this in-place scheduling, one can improve data locality and thus reduce interprocessor communication bandwidths. This means a smaller overhead in chip routing area or communication cycles. The methods also apply to general parallel processing with trellis-like computational graphs.<>