Characterization of substrate noise coupling in high speed CMOS current-steering D/A converter

The substrate noise of high speed CMOS current steering D/A converter is analyzed in the paper. Based on the proposed methodology for modeling substrate noise coupling and 14-bit DAC circuits, the effects on frequency performance of high speed CMOS current steering DAC is analyzed and simulated in TSMC 0.35 /spl mu/m CMOS technology. The simulated and measured results shown that the proposed methodology for substrate noise is correct.