Metal gate-all-around CMOS integration using poly-gate replacement through contact hole (PRETCH)

In this paper, the authors presented an integration strategy for metal gate GAA transistors made by SON process using poly-gate replacement through contact hole (PRETCH). Double gate (DG) type MOSFETs, including planar DG gate-all-around and fin-FETs are today known as the best candidates for the ultimate sealing of the logic CMOS technologies on silicon. One of the main difficulties in optimizing DG devices is the control of the threshold voltage (V/sub th/) from high performances to low power devices. With polysilicon gates, a higher channel doping has to be used when lowering the silicon thickness (T/sub Si/). This adjustment strategy has its limits and thus, gate workfunction engineering seems necessary for thin DG transistors.