Threshold voltage-assisted reduction of molecules in hybrid silicon/molecular memory devices

New observations showing V/sub T/-assisted reduction of redox-active molecules in hybrid silicon/molecular memory devices are reported in this paper. These devices were fabricated by incorporating functionalized ferrocene molecules on varying thickness of SiO/sub 2/ on p-Si substrates. The reduction (erase) process was found to occur at two voltages - (i) at the reduction voltage of the molecules, and (ii) at the threshold voltage (V/sub T/) of the capacitor. The former depends on the electron-tunneling rate from Si to the molecules through SiO/sub 2/, while the latter is due to the formation of an inversion layer. Increased retention times were observed for devices with thick SiO/sub 2/ due to limited reduction via step (i). This behavior can be utilized to tune the write, erase and retention properties of these hybrid memory devices.