Infrastructure for successful BEOL characterization and yield ramp at the 65 nm node and below

BEOL yield characterization is increasingly difficult on advanced technology nodes using traditional short flow devices. A new BEOL technology development read only memory (TDROM/spl trade/) has been used to successfully drive BEOL yield learning on the 65 nm node. The addressable nature of the TDROM/spl trade/ allows isolation of all fails to within 2 um/sup 2/ using known memory testing techniques which has resulted in accelerated yield learning, and PFA utilization. The eight megabit array size allows exhaustive DOE for all design rules and margins.