The Vth controllability of 5nm body-tied CMOS FinFET

In this paper, we demonstrate a 5nm width body-tied CMOS finFET on bulk Si for the first time. Also the threshold voltage control of the 5nm finFET is shown by using channel and pocket doping profile optimization along the narrow active fin. The excellent performance of finFET such as an excellent subthreshold swing (SS), and drain induced barrier lowering (DIBL) characteristics were found. And the systemic analyses of electrical characteristics dependencies on the fin width were evaluated for various fin width (5 /spl sim/ 100nm).