A 1.8V, 14.5mW 2nd order passive wideband sigma-delta modulator

In this paper, a passive 2nd order lowpass continuous time sigma-delta modulator is presented. An RLC filter is used in the modulator to replace the integrator so that the sampling frequency is not limited by the op-amp of the integrator. The system is analyzed and simulated in matlab, and a circuit using this method was accomplished with TSMC 0.18 /spl mu/m CMOS technology. The peak SNR can reach 67 dB and 43 dB, respectively, at system level and circuit level when the bandwidth is 10 MHz.