A 106dB SNR hybrid oversampling ADC for digital audio

A /spl Delta//spl Sigma/ ADC with a CT 1/sup st/-stage is presented. A hybrid tuning circuit adjusts the RC time constant to compensate for process, supply, and sampling rate variations. The ISI of the feedback DAC is eliminated by an RTZ scheme applied to the error current of the CT integrator. The ADC achieves 106dB SNR, -97dB THD+N, occupies 0.82mm/sup 2/ in a 0.35/spl mu/m CMOS process and dissipates 18mW.