A circuit-sensitive methodology for evaluating substrate noise

The paper proposes a practical methodology for analyzing the impact of substrate noise in any sensitive circuit. From this methodology, a figure of merit (FOM) is presented which can be used to compute the sensitivity of a circuit node to substrate noise. Simulations of a CMOS LNA prove the usefulness of this approach as an expeditious, yet effective, means for determining the portions of a circuit most sensitive to substrate noise.