Implementing the TIL Concept in high-power GTO's

This work reports the results obtained in the implementation of the novel two interdigitation level (TIL) gate-cathode configuration in high-voltage (2000 V), high-current (600 A), gate turn-off (GTO) thyristors. It is shown that the implementation of the TIL concept in high-power GTO's, while relaxing the trade-off between the doping/ width of the p base and the main electrical parameters, offers a fair balance between manufacturability ease/cost effectiveness and overall device performance. A distinct benefit obtained through the implementation of the TIL pattern in high-power GTO's is expressed by the ability of devices with an active area of only 1.7 cm
²
to safely switch off an anode current of 600 A with a practically usable operational turn-off gain G
off
of 5-8. The low on-state voltage drop of gold-doped, high-power TIL GTO's is accompanied by a high nonrepetitive surge current capability. The trial devices possess a good latching/turn-on sensitivity accompanied by an immunity to noise (high dV/dt capability).