A sub-100 picosecond bipolar ECL technology

A fully Self-Aligned Polysilicon bipolar transistor with Trench structure (SAPT) has been developed for its application in high-performance ECL circuits. An ECL gate delay of 80 ps was obtained with a transistor designed with 2 micron lithography (1.5 um emitter). This new transistor structure with two levels of polysilicon and trench technique for isolation promises to become very attractive for giga-bit digital systems.