NMOS protection circuitry

This paper discusses the major models that relate to breakdown phenomena and how they relate to protection-circuit design. The voltage-, current-, and temperature-dependent models are empirically extended to three dimensions. Using the resultant model, test structures were designed, processed, and evaluated. From this work, the key design and layout parameters for NMOS have been determined. With an optimized layout, electrostatic discharge protection up to 8 kV can be obtained.