A low-power, high-speed 0.25 µm GaAs D-FF

A design for low-power, high-speed static GaAs HJFET flip-flops (D-FFs) is discussed in detail. Four different types of delay latches based on NOR gates were designed. These latches were used to design 16 different types of D-FFs. A D-FF named "1POP" was chosen for fabrication using 0.25 µm GaAs HJFET technology. Experimental results showed that both the maximum operating clock frequencies (f
mc
) and power dissipations at f
mc
were proportional to supply voltage (V
D
). The "1P0P" D-FF operated at f
mc
of 5.17 GHz on V
D
=0.6 V consuming only 2.03 mW that is the world's lowest power dissipation. Clear, wide eye openings were obtained in a f
mc
range up to 7.15 GHz. Operating speeds were confirmed at an error rate of less than 10
^-9
with a (2
⁹
-1) pseudo-random signal.