Switched-capacitor circuits using a single-phase scheme

A novel single phase scheme for use in switched-capacitor (SC) circuits is described. Signal integrity is preserved by exploring the gap between the high conductance region of PMOS and NMOS switches at low power-supply voltages and the fast clock transitions that exist in advanced CMOS technologies. In order to illustrate the attractiveness of the proposed scheme, two practical circuit examples are presented. Electrical simulated results of a low-voltage 2/sup nd/-order /spl Sigma//spl Delta/ modulator clearly demonstrate the improvements in terms of harmonic distortion that can be achieved using this technique.