A novel substrate-triggered ESD protection structure for a bus switch IC with on-chip substrate-pump

Experimental results show ESD level will become worse if more I/O pins are connected to the ground during I/O to I/O ESD zapping for the substrate pumped bus switch IC. As a result, it will fail +1KV during I/O to all other I/O HBM ESD zapping configurations. A new substrate-triggered ESD protection structure is proposed to increase the ESD robustness of this special bus switch product. The test results show the IC with this new ESD protection structure can pass the +3kV HBM ESD test.