A novel analytical thermal model for temperature estimation of multilevel ULSI interconnects

The increasing temperature rise of on-chip interconnects has been the very important constraints for high performance chip design. In this paper, we present a novel analytical thermal model for estimating the temperature rise of multilevel ULSI interconnects, and investigate in detail the impact of joule heating, via effect and heat fringing effect. After considering the via effect and heat fringing effect of multilevel ULSI interconnects, LTem provides more accurate temperature estimation of the multilevel interconnects.