Hardware oriented architectures for continuous-speech speaker-independent ASR systems

In this paper we focus on the design and development of high performance speech recognition systems. The main problem with state-of-the-art speech recognition systems software is the uneven balance of accuracy and speed: systems with high level of accuracy tend to be extremely slow while fast systems have a degree of accuracy not suitable for most general purpose applications. We propose to speed up the system by performing the most computationally demanding task with dedicated hardware. We firstly analyse some commonly used ASR algorithms in order to choose the most suitable one. Then we develop a parallel hardware architecture that implements the selected algorithm. Finally we show how we described the proposed architectural model using the SystemC extension to the C++ programming language. Simulation results are given, along with reference tests made with the HTK's speech recogniser for comparison purposes.