A spatiotemporal CMOS imager for nanosecond low power pulse detections

Nowadays, imagers based on CMOS active pixel sensors (APS) have performances that are competitive with those based on charge-coupled devices (CCD). CMOS imagers offer advantages in on-chip functionalities, system power reduction, cost and miniaturization. The aim of the FAst MOS Imager (FAMOSI) project is to reproduce streak camera functionality with a CMOS imager. We present FAMOSI 2, which has a new pixel architecture which implements an electronic shutter and analogue accumulation capabilities. With this kind of pixel and a new architecture for controlling integration, FAMOSI 2 can work in the low power repetitive synchroscan mode. The prototype has been fabricated in the AMS 0.35 /spl mu/m CMOS process. The chip is composed of 64 columns by 64 rows of pixels. The pixels have a size of 20 /spl mu/m by 20 /spl mu/m and a fill factor of 47%. The experiments show that a conversion gain of 4.8 /spl mu/V/e/sup -/ is obtained with a dynamic range of 1.2 V. The simulation shows a time resolution of 400 ps and a light pulse repetition rate of 300 kHz.