CODACS prototype: a platform-processor for CHIARA programs

CODACS (configurable dataflow computing system) project target is to realize a high performance reconfigurable computing system demonstrator able to directly execute in hardware dataflow graphs generated compiling programs written in CHIARA language. In this paper we present the reconfigurable environment and how it executes chunks of a dataflow graph produced by CHIARA compiler. This environment, which is transparent to the user, consists of a set of processing elements called platform-processors. Each platform-processor, based on the static dataflow model, is created by a set of identical computing units (CUs) and a reconfigurable interconnect. While CUs execute any elementary operator of the language, implement the actor described in the homogeneous high-level dataflow system model, and act according to the model firing rules, the reconfigurable interconnect allows to execute dataflow graphs directly in hardware. Furthermore, thanks to the homogeneous actor I/O conditions (one output and two input links) of the model, a one-to-one mapping between dataflow actors of the model and CUs occurs in a straightforward manner. Consequently, the platform-processor executes dataflow graphs without: a) using memory to store partial results when data tokens flow from a CU to another; b) generating control tokens during this computation so that graph executions can happen in a completely asynchronous manner. However, synchronizing CUs activities, the platform-processor architecture also allows the execution of pipeline operations.