System support to balance the resource supply and demand in high-end computing

Modern and large scale high-end systems built by commercial processors can easily provide unbalanced computing resources with over-supplied CPU cycles and increasingly long latency of data accesses at different levels of the memory hierarchy for high demands of data-intensive applications. The imbalance is mainly caused by two technology changes. First, the speed gap between the CPU and the memory and the I/O storage continues to grow. Second, the latency improvement significantly lags behind the bandwidth improvement in any pair connection of the computer systems. We are working on three research projects to cope with the imbalance problem. (1) We develop models to characterize the increasingly complex and deep memory hierarchy, providing critical insights and guidance for high-end systems design. (2) We develop several memory-centric load-sharing schemes and their implementations for high end-systems management. (3) We develop efficient locality-aware caching algorithms and their system implementations for virtual memory and buffer cache management. This paper briefly report the background, motivation, and working progress of our research funded by the NSF NGS program.